Perspectives, Science and Technologies for Novel Silicon on Insulator Devices - Erstausgabe

EAN (ISBN-13): 9780792361176
ISBN (ISBN-10): 0792361172
Taschenbuch
Erscheinungsjahr: 1999
Herausgeber: Springer Netherlands
368 Seiten
Gewicht: 0,556 kg
Sprache: eng/Englisch

Buch in der Datenbank seit 2007-04-06T04:57:28+02:00 (Vienna)
Detailseite zuletzt geändert am 2023-07-15T18:13:24+02:00 (Vienna)
ISBN/EAN: 0792361172

ISBN - alternative Schreibweisen:
0-7923-6117-2, 978-0-7923-6117-6
Alternative Schreibweisen und verwandte Suchbegriffe:
Autor des Buches: vladimir nazarov, lysenko, peter will
Titel des Buches: perspectives, silicon insulator technology, kyiv, devices wonder, science and technologie

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Daten vom Verlag:

Autor/in: Peter L.F. Hemment; Vladimir S. Lysenko; Alexei N. Nazarov
Titel: NATO Science Partnership Subseries: 3; Perspectives, Science and Technologies for Novel Silicon on Insulator Devices
Verlag: Springer; Springer Netherland
344 Seiten
Erscheinungsjahr: 1999-12-31
Dordrecht; NL
Sprache: Englisch
53,49 € (DE)
54,99 € (AT)
59,00 CHF (CH)
Available
XXII, 344 p.

BC; Hardcover, Softcover / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Elektronik; Verstehen; CMOS; Laser; Sensor; Transistor; development; electronics; field-effect transistor; metal oxide semiconductur field-effect transistor; microelectromechanical system (MEMS); modeling; simulation; static-induction transistor; thin film; thin film transistor; Electronics and Microelectronics, Instrumentation; Optical Materials; Condensed Matter Physics; Spectroscopy; Electrical and Electronic Engineering; Mechanical Engineering; Technische Anwendung von elektronischen, magnetischen, optischen Materialien; Physik der kondensierten Materie (Flüssigkeits- und Festkörperphysik); Spektroskopie, Spektrochemie, Massenspektrometrie; Elektrotechnik; Maschinenbau; BB

Section 1: Innovations in Materials Technologies.- 1.1 Invited “SMART-CUT® Technology: Basic Mechanisms and Applications”.- 1.2 Invited “Polish Stop Technology for Silicon on Silicide on Insulator Structures”.- 1.3 Invited “Homoepitaxy on Porous Silicon with a Buried Oxide Layer: Full-Wafer Scale SOI”.- 1.4 “Structural and Electrical Properties of Silicon on Isolator Structures Manufactured on FZ- and CZ-Silicon by SMART-CUT Technology”.- 1.5 “Development of Linear Sequential Lateral Solidification Technique to Fabricate Quasi-Single-Crystal Super-Thin Si Films for High-Performance Thin Film Transistor Devices”.- Section 2: Economics and Innovation Applications.- 2.1 Invited “Low Temperature Polysilicon Technology: A Low Cost SOI Technology?”.- 2.2 Invited “A Novel Low Cost Process for the Production of Semiconductor Polycrystalline Silicon from Recycled Industrial Waste”.- 2.3 Invited “Tetrahedrally Bonded Amorphous Carbon for Electronic Applications”.- 2.4 Invited “Diamond Based Silicon-on-Insulator Materials and Devices”.- 2.5 Invited “Low-Temperature Processing of Crystalline Si Films on Glass for Electronic Applications”.- 2.6“?-SiC on SiO2 Fonned by Ion Implantation and Bonding for Micromechanics Applications”.- 2.7 “Laser Recrystallised Polysilicon Layers for Sensor Applications: Electrical and Piezoelectric Characterisation”.- Section 3: Characterisation Methods for SOI.- 3.1 Invited “Optical Spectroscopy of SOI Materials”.- 3.2 Invited “Computer Simulation of Oxygen Redistribution in SOI Structures”.- 3.3 Invited “Electrical Instabilities in Silicon-on-Insulator Structures and Devices During Voltage and Temperature Stressing”.- 3.4 “Hydrogen as a Diagnostic Tool in Analysing SOI Structures”.- 3.5“Back Gate Voltage Influence on the LDD SOI NMOSFET Series Resistance Extraction from 150 to 300 K”.- 3.6 “Characterisation of Porous Silicon Layers Containing a Buried Oxide Layer”.- 3.7 “Total-Dose Radiation Response of Multilayer Buried Insulators”.- 3.8 “Recombination Current in Fully-Depleted SOI Diodes: Compact Model and Lifetime Extraction”.- 3.9 “Investigation of the Structural and Chemical Properties of SOI Materials by Ellipsometry”.- 3.10 “Experimental Investigation and Modelling of Coplanar Transmission Lines on SOI Technologies for RF Applications”.- Section 4: Perspectives for SOI Structures and Devices.- 4.1 Invited “Perspectives of Silicon-on-Insulator Technologies for Cryogenic Electronics”.- 4.2 Invited “SOI CMOS for High-Temperature Applications”.- 4.3 Invited “Quantum Effect Devices on SOI Substrates with an Ultrathin Silicon Layer”.- 4.4 Invited “Wafer Bonding for Micro-ElectroMechanical Systems (MEMS)”.- 4.5 “A Comprehensive Analysis of the High-Temperature Off-State and Subthreshold Characteristics of SOI MOSFETs”.- 4.6 “Influence of Silicon Film Parameters on C-V Characteristics of Partially Depleted SOI MOSFETs”.- 4.7 “Effect of Shallow Oxide Traps on the Low-Temperature Operation of SOI Transistors”.- 4.8 “Nanoscale Wave-Ordered Structures on SOI”.- 4.9 “Thin Partial SOI Power Devices for High Voltage Integrated Circuits”.- Keyword Index.- Author Index.